Davicom DM9161BEP 10/100 Mbps Fast Ethernet Physical Layer Single Chip Transceiver

MII, RMII

SMT

PHY

Davicom

DM9161BEP

Taiwan, China

Network Interface Adapter, Surveillance Camera, Embedded System, Ethernet Hub, Ethernet Switch

DM9161B Series

DAVICOM's DM9161B is a physical layer, single-chip,and low power 100BASE-TX/10BASE-T transceiverspecifically designed for consumer electronics, industrial andenterprise applications. For the media usage, it providesa direct interface either to Unshielded Twisted PairCategory 5 Cable (UTP5) for 100BASE-TX FastEthernet, or UTP5/UTP3 Cable for 10BASE-TEthernet.Through the Media Independent Interface (MII),DM9161B not only connects the Medium AccessControl (MAC) layer but also ensur a high interoperability from different vendors.TheDM9161B uses a CMOS process which hasadvantages of power consumption saving and highperformance .It contains the entire physical layer functions of100BASE-TX which is defined by IEEE802.3u,including the Physical Coding Sub layer (PCS),Physical Medium Attachment (PMA), Twisted PairPhysical Medium Dependent Sub layer (TP-PMD),10BASE-TX Encoder/Decoder (ENC/DEC), andTwisted Pair Media Access Unit (TPMAU).The DM9161B provides a strong support for theauto-negotiation function, utilizing automatic mediaspeed and protocol selection. In the bargain, , theDM9161B needs no external filter to transport signalsto the media in 100BASE-TX or 10BASE-T Ethernetoperation because of the built-in wave shaping filter

48-pin LQFP 0.18um process

Fully comply with IEEE 802.3 / IEEE 802.3u 10Base-T/100Base-TX, ANSI X3T12 TP-PMD 1995 standard, Support HP MDI/MDI-X auto crossover function (HP Auto-MDIX), Support Auto-Negotiation function, compliant with IEEE 802.3u, Fully integrated Physical layer transceiver, On-chip filtering with direct interface to magnetic transformer, Selectable repeater or node mode, Selectable MII or RMII (Reduced MII) mode for 100Base-TX and 10Base-TX, Selectable MII or GPSI (7-Wired) mode for 10Base-T, Selectable full-duplex or half-duplex operation, MII management interface with maskable interrupt output capability, Provide Loopback mode for easy system diagnostics, LED status outputs indicate Link/Activity, Speed 10/100 and Full-duplex/Collision, Support Dual-LED optional control, Single low power supply of 3.3V with an advanced CMOS technology, Lower power consumption modes: Power Reduced mode (cable detection), Power Down mode, Selectable TX drivers for 1:1 or 1.25:1 transformers for additional power reduction (1:1 transformers only when HP Auto-MDIX Enable), Compatible with 3.3V and 5.0V tolerant I/Os, Pin-to-pin compatible with DM9161A, DSP architecture PHY Transceiver, 48-pin LQFP, 0.18μm process

-40~85

10/100Mbps

48-pin LQFP 0.18um process

3.3V, I/O 3.3V to 5V

IEEE 802.3, IEEE 802.3u

Multiple of 250

40X20X12 cm